1. Field of the Invention
The present invention relates to a voltage-controlled oscillator, and particularly to a voltage-controlled oscillator of a ring oscillator type and a phase-locked loop circuit using the voltage-controlled oscillator.
2. Description of Related Art
A voltage-controlled oscillator (VCO) has been widely used in the fields of communication and digital signal processing. Especially, a voltage-controlled oscillator of a ring oscillator type with a CMOS configuration is often used for an integrated-circuit voltage-controlled oscillator. As the most typical voltage-controlled oscillator of the ring oscillator type, the one as described in Patent Document 1 is well known in which an odd number of stages of CMOS inverters are cascade-connected and an output of the inverter of the last stage is fed back to an input of the inverter of a first stage.
FIG. 1 is a circuit diagram of the voltage-controlled oscillator of the ring oscillator type, disclosed by patent Document 1. In the circuit, a ring oscillator is configured so that an output of a last stage 13 among three stages of CMOS inverter circuits I1, I2 and I3 cascade-connected in series is inputted to the inverter I1 of the first stage. Power is supplied to the ring oscillator from a p-channel MOS current-source transistor P2 and an n-channel MOS current-source transistor N3.
Moreover, in FIG. 1, circuits for respectively supplying first and second reference voltages to gates of the current-source transistors P2 and N3 are described. A gate and a drain of an n-channel MOS transistor N1 are connected to each other, and a first reference voltage signal is generated by a voltage obtained between the gate and a source of the n-channel MOS transistor N1 by feeding a constant current to the transistor N1. Furthermore, a gate and a drain of a p-channel MOS transistor P1 are connected to each other, and a second reference voltage is generated by a voltage obtained between the gate and a source of the p-channel MOS transistor P1 by feeding, to the p-channel MOS transistor P1, a current caused by a current mirror circuit formed of n-channel MOS transistors N1 and N2 to flow through a source and a drain of the n-channel MOS transistor N2. The circuit is known for its capabilities of controlling the first and second reference voltages by changing a current to be fed to the n-channel MOS transistor N1, and thereby of further changing an oscillation frequency of the ring oscillator by controlling a current flowing through current-source transistors P2 and N3.
In addition, a voltage-controlled oscillator is also known in which the CMOS inverters forming the ring oscillator are replaced with differential amplifiers to lower sensitivity to power supply noise, and thus to stabilize process variation. FIG. 2 is a circuit diagram of a voltage-controlled oscillator using differential amplifiers described in Patent Document 2.
The ring oscillators of the CMOS type described in Patent Documents 1 and 2 have an advantage of being able to widely secure frequency characteristics in a relatively small area compared with a voltage-controlled oscillator with an LC configuration. However, they are generally considered to have poorer phase noise characteristics than the voltage-controlled oscillator with the LC configuration.
A voltage-controlled oscillator with a CMOS ring oscillator configuration in which the phase noise characteristics are improved is described in Non-patent Document 1. FIG. 3 is a circuit diagram of a single stage of a delay circuit forming the ring oscillator. The ring oscillator can be formed by cascade-connecting multiple delay circuits and feeding back an output of the last stage of the delay circuit to an input of the first stage thereof.
Delay elements forming the ring oscillator receive one of differential inputs and output one of differential outputs with a first buffer inverter formed of MP21 and MN21, as well as receive the other of the differential inputs and output the other of the differential outputs with a second buffer inverter formed of MP22 and MN22. The power of the first and second buffer inverters is supplied from current sources composed of PMOS transistors MP11 and MP12 and NMOS transistors MN11 and MN12. The currents to be fed through the current sources make it possible to control oscillation frequencies.
Moreover, a latch is formed by an inverter formed of MP31 and MN31 and an inverter formed of MP32 and MN33. The latch allows the first and second buffer inverters to control phases of signals so as to be differential outputs while securing oscillation amplitude. Thereby, the phase noise characteristics and the jitter characteristics are improved.
[Patent Document 1] Japanese Patent Application Publication No. 2002-117671 (FIG. 2)
[Patent Document 2] Japanese Patent Application Publication No. 2000-315939 (FIG. 2)
[Non-patent Document 1] hi-Qiang lu, Feng-Chang Lai and Jian-Guo Ma; “A Low-Phase-Noise CMOS Ring Oscillator with differential Control”; ASIC, 2005. ASICON2005. Vol. 2. pp. 540-543. Journal of the sixth international conference; Oct. 24-27, 2005.